![](../../../images/WB01725_.gif) |
TMS320VC33
150MFLOPS 32-bit high performance floating-point DSP |
![](../../../images/WB01725_.gif) |
up to
512Kx32 SRAM |
![](../../../images/WB01725_.gif) |
up to
1Mx8 of plug-in FLASH/EPROM for stand-alone operation |
![](../../../images/WB01725_.gif) |
on-board Shared
Bus (SB) architecture with PCI and DSP SB masters |
![](../../../images/WB01725_.gif) |
high-performance
PCI-bus host I/F with multi-channel PCI-to-DSP communication:
![](../../../images/WB01689_.gif) |
direct
PCI-to-SB access |
![](../../../images/WB01689_.gif) |
data transfer
between PCI and DSP via bi-directional FIFO with PCI-mastering |
![](../../../images/WB01689_.gif) |
multi-channel
MAILBOXES for mutual interrupts |
|
![](../../../images/WB01725_.gif) |
multi-source
DSP external interrupts |
![](../../../images/WB01725_.gif) |
DSP either
starts without boot or boots from FLASH |
![](../../../images/WB01725_.gif) |
TORNADO
compatible modular construction |
![](../../../images/WB01725_.gif) |
PIOX/PIOX-16 and SIOX rev.B/C
sites for AD/DA/DIO daughter-card modules and application
specific I/O coprocessors |
![](../../../images/WB01725_.gif) |
multiprocessor
DSP expansion |
![](../../../images/WB01725_.gif) |
watch-dog timer |
![](../../../images/WB01725_.gif) |
stand-alone
operation |
![](../../../images/WB01725_.gif) |
on-board ECC JTAG emulator running under TI Code Composer Debugger
tools |
![](../../../images/WB01725_.gif) |
build-in device
serial codes |
![](../../../images/WB01725_.gif) |
half-size PCI
board |
![](../../../images/WB01725_.gif) |
supported by TORNADO Software Development Kit (TSDK) and industry-standard DSP software tools |